
May 1998
NDT3055
N-Channel Enhancement Mode Field Effect Transistor
General Description
These N-Channel enhancement mode power field effect
transistors are produced using Fairchild's proprietary,
high cell density, DMOS technology. This very high
density process is especially tailored to minimize
on-state resistance and provide superior switching
performance. These devices are particularly suited for
low voltage applications such as DC motor control and
DC/DC conversion where fast switching, low in-line
power loss, and resistance to transients are needed.
Features
4 A, 60 V. R DS(ON) = 0.100 ? @ V GS = 10 V.
High density cell design for extremely low R DS(ON) .
High power and current handling capability in a widely used
surface mount package.
SuperSOT TM -3
D
SuperSOT TM -6
SuperSOT TM -8
D
D
SO-8
SOT-223
SOIC-16
D
D
S
S
SOT-223
G
G
D
S
SOT-223*
G
G
S
(J23Z)
Absolute Maximum Ratings
T A = 25 o C unless otherwise noted
Symbol
V DSS
V GSS
Parameter
Drain-Source Voltage
Gate-Source Voltage - Continuous
NDT3055
60
±20
Units
V
V
I D
Maximum Drain Current - Continuous
(Note 1a)
4
A
- Pulsed
25
P D
Maximum Power Dissipation
(Note 1a)
3
W
(Note 1b)
(Note 1c)
1.3
1.1
T J ,T STG
Operating and Storage Temperature Range
-65 to 150
°C
THERMAL CHARACTERISTICS
R θ JA
R θ JC
Thermal Resistance, Junction-to-Ambient
Thermal Resistance, Junction-to-Case
(Note 1a)
(Note 1)
42
12
°C/W
°C/W
* Order option J23Z for cropped center drain lead.
? 1998 Fairchild Semiconductor Corporation
NDT3055 Rev.B